||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||| supervisory circuit 2014 - 08 - 0010 pt0190 - 7 0 9 / 1 1 /1 4 1 pt7m 1818/1813 features ? highly accurate: ? 1.5% (25c) ? a ccurate power monitoring: 2.5v, 2. 9 v, 3.0v (pt7m1818), and 4.1, 4.3, 4.6v (pt7m1813) ? operating voltage range: 1.0v ~ 5.5v ? operating temperature range: - 40c to + 85c ? detect voltage temperature characteristics: ? 2.5% ? typ ? efficient ope n - drain output with internal 5k ? pull - up resistor ? maintains reset for 20 0ms after v cc returns to an in - tolerance condition description the seri e s are designed to monitor power supplies in p and digital systems. it provides excellent circuit reliability and low cost by eliminating ex ternal components and adjustments. this device performs a single function: it asserts a reset signal whenever the v cc supply voltage falls below a preset threshold. reset remains asserted for 200ms after v cc has risen above the reset threshold. pt7m 1818/1 813 are bidirectional output, allowing it to be directly connected to p with bidirectional reset inputs. pin configuration pin description name type description rst i/o reset output and pushbutton input: rst is asserted when v cc drops below voltage threshold v th - . active low. when other devices pull rst low, the reset condition occurs and will remain a reset timeout period after the external signal is off. gnd p ground v cc p supply voltage. 2 1 3 vcc gnd sot23-3 pt7m1818/1813 rst
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||| 2014 - 08 - 0010 pt0190 - 7 0 9 / 1 1 /1 4 2 pt7m1818/1813 supervisory circuit maximum rati ngs storage temperature ............................................................ - 65 o c to +150 o c ambient temperature with power applied.......................... - 40 o c to +85 o c supply voltage to ground potential (vcc to gnd) .............. - 0.3v to +7 .0v dc input voltage (all inputs except vcc and gnd)...... - 0.3v to v cc +0.3v dc output current (all outputs) .......................................................... 3 0ma power dissipation .............. ............................ 320mw (depend on package ) dc electrical characteristics (t a = - 40~85oc, unless otherwise noted. typical values are at t a = +25oc) description sym. test conditions min typ max unit supply voltage v cc 1.0 - 5.5 v supply current i cc v cc = 5.5v. no load. - - 12 a v cc = 3.6v . no load. - - 10 a voltage threshold v th - +25 ? th - ) ? th - (v th - ) ? ? ? th - ) ? th - (v th - ) ? hys v th+ - v th - * - 50 - mv output driving output low v ol i oh = 8ma, v cc = 5v - - 0.4 v i oh = 4ma, v cc = 3v - - 0.3 i oh = - 50a, v cc = 1v - - 0.09 i nternal pull - up resistor rp rst 3.75 5 6.25 k ? note: v th - is voltage threshold when v cc falls from high to low. v th+ is voltage threshold when v cc rises from low to high. note: stresses greater than those listed under m aximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operati onal sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||| 2014 - 08 - 0010 pt0190 - 7 0 9 / 1 1 /1 4 3 pt7m1818/1813 supervisory circuit ac electrical characteristics fig 1 . t iming diagram (v cc = 1.0v to 5.5v, t a = - 40~85oc, unless otherwise noted. typical values are at t a = +25oc) sym. description test conditions min typ max unit t rs reset timeout period - 140 200 280 m s t rpd delay - - 17 - ? sen sensitivity - 20 - - ? pd external pull down signal pulse rst pin 1 - - ? * rst pin 0.8 1.5 2.0 v *note: rst will be asserted when it is pull down to the typical value or less. fig 2 . t iming diagram vcc v rst 1v 0v t rs t sen t rs 1v 0v uncertain state rst t rpd vcc v rst 1v 0v t rs 1v 0v uncertain state 0.8v t pd t rs external pull down signal release 0.8v cc rst
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||| 2014 - 08 - 0010 pt0190 - 7 0 9 / 1 1 /1 4 4 pt7m1818/1813 supervisory circuit block diagram function description power monitor a microprocessors (ps) reset input starts the p in a known state. whenever the p is in an unknown state, it should be held in reset. the supervisory circuits assert reset during power - up and preven t code execution errors during power - down or brownout conditions. on power - up, once vcc reaches about 1 . 0 v, rst is a guaranteed logic low of 0.4v or less. as vcc rises, rst stays low. when vcc rises above the reset threshold v rst , an internal timer r eleases rst after about 200ms. rst asserts whenever vcc drops below the reset threshold, i.e. brownout condition. if brownout occurs in the middle of a previously initiated reset pulse, the pulse continues for at least another 200ms. on power - down, once vc c falls below the reset threshold, rst stays low and is guaranteed to be 0.4v or less until vcc drops below 1v. reset output: bi - direction the devices provide rst output pin for a pushbutton switch. when the devices are not in a reset cycle, it cont inuously monitors the rst signal for a low going edge. if an edge is detected, the devices will debounce the switch by pulling the rst line low . after the internal timer has expired, the devices will continue to monitor the rst line. if the line is still l ow, they will continue to monitor the line looking for a rising edge. upon detecting a release, they will force the rst line low and hold it low for 20 0ms. application information typical operation circuit pt7m1818 /1813 pt7m70xxbl pt7m71xxbl rst vcc reset microprocessor t.c. reference reset monitor timing delay vcc gnd 5k rst vcc resistor divider
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||| 2014 - 08 - 0010 pt0190 - 7 0 9 / 1 1 /1 4 5 pt7m1818/1813 supervisory circuit mechanical information sot23 - 3 ordering information part number package code package pt7m1818 - 20t e t lead free and green sot23 - 3 pt7m1818 - 10t e t lead free and green sot23 - 3 pt7m1818 - 5t e t lead free and green sot23 - 3 pt7m1813 - 15t e t lead free and green sot23 - 3 pt7m1813 - 10t e t lead free and green sot23 - 3 pt7m1813 - 5t e t lead free and green sot23 - 3 note: ? e = pb - free or pb - free and green ? adding x suffix = tape /r eel ? contact pericom for availability. symbol min max a 1.05 1.25 a1 0.00 0.10 a2 1.05 1.15 b 0.3 0 0.5 0 c 0.1 0 0 .20 d 2.82 3.02 e 1.50 1.70 e1 2.65 2.95 e e1 1.80 2.00 l 0.30 0.60 0 8 pkg. dimensions(mm) 0.95bsc document control no. pd-0018 revision: a date: 5/17/2011 pericom technology (shanghai) co.ltd . 3 /f., 20 building , 481 gui ping road, shanghai, 200233 tel:( 86 - 21 ) 6485 - 0576 . fax: ( 86 - 21 ) 6485 - 2181 description: 3 - pin small outline transistor, plastic package, sot - 23 package code: ta3 note: 1) controlling dimensions in millimeters.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||| 2014 - 08 - 0010 pt0190 - 7 0 9 / 1 1 /1 4 6 pt7m1818/1813 supervisory circuit s mall package top marking instruction samp le: qw lj part no.: pt7m 1818 - 20 date code: year 2003 ww10 lead free and lead free and green package table 1. function comparison table 2 marking code for products no. part no. code 1 pt7m 1818 - 20 qw 2 pt7m 1818 - 10 ra 3 pt7m 1818 - 5 rb 4 pt7m 1813 - 15 rl 5 pt7m 1813 - 10 ro 6 pt7m 1813 - 5 rr pericom semiconductor corporation ? 1 - 800 - 435 - 2336 ? w ww.pericom.com pericom reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. pericom does not assume any responsibility for use of any circuitry described other than the circuitry embodied in pericom product. the company makes no representations that circuitry described herein is free from patent infringement or other rights, of pericom . item part no. reset output v th - (v) open - drain push - pu ll bi - direct active high active low active high active low active low 1 pt7m1818 - 20 - - - - ? pt7m 1818 - 10 - - - - ? pt7m1818 - 5 - - - - ? pt7m 1813 - 15 - - - - ? pt7m1813 - 10 - - - - ? pt7m 1813 - 5 - - - - ? aa lj part no. 2 bit code (see table 1) date code year & work week lead - free sign - : lead - free or lead free and green
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